glenda.party
term% ls -F
term% pwd
$home/manuals/9front/3/arch
term% cat index.txt
ARCH(3)                    Library Functions Manual                    ARCH(3)



NAME
       arch - architecture-specific information and control

SYNOPSIS
       bind -a #P /dev
       /dev/acpitbls
       /dev/archctl
       /dev/cputype
       /dev/ec
       /dev/ioalloc
       /dev/iob
       /dev/iol
       /dev/iow
       /dev/irqalloc
       /dev/msr

DESCRIPTION
       This  device  presents textual information about PC hardware and allows
       user-level control of the I/O ports on  x86-class  and  DEC  Alpha  ma‐
       chines.

       Reads  from  cputype  recover the processor type and clock rate in MHz.
       Reads from archctl yield at least data of this form:

              cpu AMD64 2201 pge
              pge on
              coherence mfence
              cmpswap cmpswap486
              i8253set on
              cache default uc
              cache 0x0 1073741824 wb
              cache 0x3ff00000 1048576 uc

       Where is the processor type, is the processor  speed  in  MHz,  and  is
       present  only if the `page global extension' capability is present; the
       next line reflects its setting.  is followed by one of or  showing  the
       form  of memory barrier used by the kernel.  is followed by or reflect‐
       ing the form of `compare and swap' used by the kernel.  is a flag,  in‐
       dicating the need to explicitly set the Intel 8253 or equivalent timer.
       There may be lines starting with  that  reflect  the  state  of  memory
       caching  via  MTRRs (memory-type region registers).  The second word on
       the line is or a C-style number which is the base physical  address  of
       the region; the third is a C-style length of the region; and the fourth
       is one of (for uncachable),  (write-back),  (write-combining),  (write-
       protected),  or  (write-through).   A region may be a subset of another
       region, and the smaller region takes precedence.  This may be  used  to
       make  I/O registers uncachable in the midst of a write-combining region
       mostly used for a video framebuffer, for example.  Control messages may
       be  written  to  archctl  and use the same syntax as the data read from
       archctl.  Known commands include and

       Reads from ioalloc return I/O ranges used by each device, one line  per
       range.  Each line contains three fields separated by white space: first
       address in hexadecimal, last address, name of device.

       Reads from irqalloc return the enabled interrupts, one line per  inter‐
       rupt.   Each  line  contains three fields separated by white space: the
       trap number, the IRQ it is assigned to, and the name of the device  us‐
       ing it.

       Reads  and  writes  to iob, iow, and iol cause 8-bit wide, 16-bit wide,
       and 32-bit wide requests to I/O ports.  The port accessed is determined
       by the byte offset of the file descriptor.

       Reads and writes to msr go to the P4/P6/Core/Core2/AMD64 MSRs.

       Reads  and  writes  to  ec transfer bytes from and to the embedded con‐
       troller.

       Reads from acpitbls return a concatenation of system ACPI tables.  Each
       table is prefixed with a fixed size header that gives the name sigature
       and size of the table  (see  section  5.2.6  System  Description  Table
       Header in the ACPI specification).

EXAMPLE
       The following code reads from an x86 byte I/O port.

              uchar
              inportb(unsigned port)
              {
                  uchar data;

                  if(iobfd == -1)
                      iobfd = open("#P/iob", ORDWR);

                  seek(iobfd, port, 0);
                  if(read(iobfd, &data, sizeof(data)) != sizeof(data))
                      sysfatal("inportb(0x%4.4ux): %r", port);
                  return data;
              }

SOURCE
       /sys/src/9/pc/devarch.c



                                                                       ARCH(3)